Logic Locking is a revolutionary technique for protecting Intellectual Property of Integrated Circuits from myriad security threats, such as reverse engineering, overbuilding, piracy, and hardware Trojan insertion. In this student-led Logic Locking Conquest Challenge, participants will attempt to attack designs in an oracle less scenario.

In previous years, CSAW LL has featured FPGA-based Redaction, Sequential Locking/Obfuscation, SAT-resilient locking and RTL locking.