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Logic Locking is a revolutionary technique for protecting Intellectual Property of Integrated Circuits from myriad security threats, such as reverse engineering, overbuilding, piracy, and hardware Trojan insertion. In this student-led Logic Locking Conquest Challenge, participants will attempt to attack designs locked with state-of-the-art methods. This year's challenge emphasizes the assessment of large designs (large IPs, large "keys"). Can you find out what the keys are or what the IPs do?

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In previous years, CSAW LL has featured FPGA-based Redaction, Sequential Locking/Obfuscation, and SAT-resilient locking.

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competition timeline

Mid-July 2022
Early October 2022
Early October 2022
9-12 November 2022
Competition Launch
Submission Deadline
Finalist Notification
In-Person Final Presentations
 

 research & publications

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Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking

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June 2020

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2021 winners

Congratulations to our winning teams! 
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logic lockng finalists

Congratulations to our 2021 finalists! 
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2019 competition

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competition organizers

The Logic Locking Conquest is organized by Professor Ramesh Karri, Research Assistant Professor Benjamin Tan, and PhD research students, Jitendra Bhandari and Abdul Khader Thalakkattu Moosa.

Email the Organizers

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Thank you to the National Science Foundation for their generous support of this competition

 

2020 competition