Logic Locking Conquest

Logic Locking is a revolutionary technique for protecting Intellectual Property of Integrated Circuits from myriad security threats, such as reverse engineering, overbuilding, piracy, and hardware Trojan insertion. In this student-led Logic Locking Conquest Challenge, participants will attempt to attack designs locked with state-of-the-art methods. This year's challenge emphasizes the assessment of large designs (large IPs, large "keys"). Can you find out what the keys are or what the IPs do?

In previous years, CSAW LL has featured FPGA-based Redaction, Sequential Locking/Obfuscation, and SAT-resilient locking.

200503_CSAW21_Web_Competitions_LogicL_D.

competition timeline

Mid-July 2022

Early October 2022

11 November 2022

Competition Launch

Submission Deadline

Finalist Notification

In-Person Final Presentations

Competition Details

judge

research & publications

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking

June 2020

competition organizers

The Logic Locking Conquest is organized by Assistant Professor Benjamin Tan, and PhD research students Luca Collini, and Abdul Khader Thalakkattu Moosa.